Digital Integrated Circuit Design Using Verilog and Systemverilog

Digital Integrated Circuit Design Using Verilog and Systemverilog

Digital Integrated Circuit Design Using Verilog and Systemverilog

Author: Ronald W. Mehler (Author)

Publisher finelybook 出版社:‏ ‎ Newnes

Edition 版本:‏ ‎ 1st edition

Publication Date 出版日期:‏ ‎ 2014-10-14

Language 语言: ‎ English

Print Length 页数: ‎ 448 pages

ISBN-10: ‎ 0124080596

ISBN-13: ‎ 9780124080591

Book Description

For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. The book covers not only the syntax and limitations of HDL coding, but deals extensively with design problems such as partitioning and synchronization, helping you to produce designs that are not only logically correct, but will actually work when turned into physical circuits. Throughout the book, many small examples are used to validate concepts and demonstrate how to apply design skills.

This book takes readers who have already learned the fundamentals of digital design to the point where they can produce working circuits using modern design methodologies. It clearly explains what is useful for circuit design and what parts of the languages are only software, providing a non-theoretical, practical guide to robust, reliable and optimized hardware design and development.

  • Produce working hardware: Covers not only syntax, but also provides design know-how, addressing problems such as synchronization and partitioning to produce working solutions
  • Usable examples: Numerous small examples throughout the book demonstrate concepts in an easy-to-grasp manner
  • Essential knowledge: Covers the vital design topics of synchronization, essential for producing working silicon; asynchronous interfacing techniques; and design techniques for circuit optimization, including partitioning

Review

Design robust, reliable and optimized digital integrated circuits using Verilog and SystemVerilog

About the Author

Ronald Mehler is a professor of electrical and computing engineering at California State University, Northridge. Before joining the faculty at CSUN, he worked in private industry for 20 years, mostly designing integrated circuits using hardware description languages and logic synthesis. The primary focus of his research has been on design automation for application specific integrated circuit (ASIC) development.

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