Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling


Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling Hardcover – 14 Nov. 2013
By 作者:Ayan Mandal (Author), Sunil P. Khatri (Author), Rabi Mahapatra (Author)
Publisher Finelybook 出版社: Springer; 2014th edition (14 Nov. 2013)
Language 语言: English
Hardcover: 160 pages
ISBN-10 书号:1461494044
ISBN-13 书号:9781461494041
The Book Description
This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

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